1. Field of the Invention
The present invention relates to a semiconductor device having a superlattice structure.
2. Description of the Related Technology
Semiconductor divices have been developed which are formed by laminating semiconductor layers. In these devices, superlattice buffer layers are inserted between the layers or in the layers in order to improve a quality of the heterojunction interfaces of the layers to fabricate a semiconductor device having excellent performance characteristics.
FIG. 1 shows a layer structure of a prior art semiconductor device in which superlattice buffer layers 7 and 8 are formed in a heterojunction bipolar transistor. In this semiconductor device, a substrate 1, an electrode forming layer 2, a collector layer 3, a base layer 4, an emitter layer 5, an electrode forming layer 6 and superlattice buffer layers 7 and 8 are provided to improve a quality of the heterojunction interfaces. In this layer structure, the potential period of the superlattice structure of the superlattice buffer layers 7 and 8 is decreased closer to the base layer 4 to create a tapered junction effect by which the potential changes in an inclined manner so that a decrease of the current gain due to an electron trap in a notch of an energy band which occurs in a stepped junction (in which the potential changes stepwise) is prevented.
In a prior art semiconductor laser device shown in FIG. 2, an n-GaAs electrode forming layer 22 is formed on a substrate 21, and an n-Al.sub.x Ga.sub.1-x As clad layer 23, a GaAs activation layer 24, a p-Al.sub.x Ga.sub.1-x As clad layer 25 and a p-GaAs electrode forming layer 26 are formed thereon, and a superlattice buffer layer is formed between the clad layer 23 and the activation layer 24 in order to improve the quality of the activation layer as is done in FIG. 1 and to allow a low current drive.
In such structures, electrons fall into a low energy level in the buffer layers 7 and 8 or electrons are reflected by the buffer layers 7 and 8 and a voltage drop occurs in the buffer layer. As a result, an extra voltage must be applied to the device.